1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for manufacturing a semiconductor device suitable for forming a contact hole in a DRAM (Dynamic Random Access Memory) memory cell.
2. Description of the Related Art
Firstly, an example of a method for manufacturing a DRAM will be schematically described with reference to the cross-sectional view shown in FIG. 1.
An insulating film is buried in a predetermined region in a semiconductor substrate 1 made of silicon to form an element isolation region 2. Then, transistors formed of gate insulating films 3, gate electrodes 5, 6 and impurity diffusion layers 9, 10 are formed. Gate electrodes form word lines 4, 5, 6 and 7. After each of the word lines is covered with an insulating film 8, an interlayer insulating film 11 is formed. Then, contact plugs 12, 13 and 14 connected to the impurity diffusion layers 9, 10 are formed in the interlayer insulating film 11. After an interlayer insulating film 15 is formed over the surface, a bit line contact plug 16 connected to the contact plug 13 is formed and a bit line 17 connected to the bit line contact plug 16 is formed. After an interlayer insulating film 18 is formed over the bit line, capacitance contact plugs 19 are formed through the interlayer insulating films 15 and 18 such that the capacitance contact plugs 19 are connected to the contact plugs 12 and 14. Then, a silicon nitride film 20 and a silicon oxide film 21 are formed, and deep holes are formed such that the capacitance contact plugs 19 are exposed. A lower electrode 22, a capacitance insulating film 23 and an upper electrode 24 that form a capacitor are formed in each of the deep holes. Thereafter, formation of another interlayer insulating film and formation of wiring is repeated to complete a DRAM element.
In recent years, as the degree of integration increases, the dimensions of lines and spaces of wiring and the diameters of contact holes decrease, resulting in considerable difficulty in processing wiring and contact holes. Among others, in forming the contact plugs 12, 13 and 14 shown in FIG. 1, a SAC (Self Aligned Contact) method has been used to achieve easier processing. The SAC method is described in Japanese Patent Laid-Open No. 2001-230383, No. 10-289951 and No. 10-65002. However, even when the SAC method is used to form the contact hole, the shoulder of the insulating film 8 is scraped, resulting in a serious problem of short circuit between the contact plug and the word line.
This short circuit problem of prior art will be described in more detail with reference to FIGS. 2 to 6. FIG. 2 is a plan view of the memory cell corresponding to FIG. 1, and FIGS. 3 to 6 are a series of cross-sectional views in the order of processing steps.
Firstly, the plan view of FIG. 2 will be described. The word lines 4, 5, 6 and 7 have been formed in the vertical direction such that the word lines cross active regions surrounded by the element isolation region 2. The portions between the word lines in the active regions correspond to the impurity diffusion layers 9, 10. The circles 12a, 13a and 14a indicate the positions of the contact plugs 12, 13 and 14 that overlie the positions where the impurity diffusion layers are formed. FIGS. 1 and 3 to 6 are cross-sectional views corresponding to the cross section taken along the line X-X shown in FIG. 2.
Next, a conventional method for forming contact plugs will be described with reference to a series of cross-sectional views of FIGS. 3 to 6.
Firstly, as shown in FIG. 3, after the word lines 4, 5, 6 and 7 are formed, the interlayer insulating film 11 is formed thereon. Specifically, the word line is formed of a polycrystalline silicon film 101, a tungsten film 101a, a silicon nitride film 102 and a silicon nitride film 103 that is formed in such a way that it surrounds the silicon nitride film 102 and the tungsten film 101a. A silicon nitride film 104 is formed over the surface including the word lines. The interlayer insulating film 11 formed of a silicon oxide film is further formed, and CMP (Chemical Mechanical Polishing) method is used to planarize the surface of the interlayer insulating film 11. In this description, the gate insulating film is omitted.
Then, as shown in FIG. 4, lithography is used to form a photoresist 105 as well as aperture patterns 12a, 13a and 14a corresponding to contact hole patterns in the photoresist 105. These aperture patterns correspond to the positions of the contact plugs 12a, 13a and 14a shown in FIG. 2.
Thereafter, as shown in FIG. 5, dry etching using the photoresist 105 as a mask is conducted to form contact holes 109. The etching of the interlayer insulating film 11 formed of a silicon oxide film is carried out by using fluorine-containing gas plasma. In this process, the etching rate of the silicon oxide film can be on the order of three times the etching rate of the silicon nitride film at maximum, so that the silicon nitride films 104, 103 and 102 are also disadvantageously etched during the etching of the interlayer insulating film 11. The ratio of the etching rates shows a material-specific characteristic in dry etching, so that it is difficult to greatly change the characteristic even when the condition of the gas plasma is changed.
Then, as shown in FIG. 6, after a polycrystalline silicon film is formed such that the contact holes 109 are filled, the polycrystalline silicon film is etched back to form the contact plugs 12, 13 and 14 in the contact holes 109. Consequently, as described above, the silicon nitride film at the shoulder of the word line has been etched during the formation of the contact hole, resulting in reduced thickness of the insulating film between the contact plug and the tungsten 101a that forms the word line and hence a possibility of short circuit. If short circuit occurs, the DRAM will not operate.
Patent Documents associated with the formation of the contact holes described above include Japanese Patent Laid-Open No. 2001-230383, No. 10-289951 and No. 10-65002.
As described above, the method for forming a contact hole by using dry etching reduces the thickness of the insulating film at the portion indicated by the circle A in FIG. 6, resulting in difficulty in preventing the short circuit between the contact plug and the word line. To ensure the normal operation of the DRAM, there is a desire to develop a method for forming a contact hole in which sufficient thickness of the insulating film between the contact plug and the word line is provided to prevent short circuit.